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Hardware design and implementation of a novel ANN-based chaotic generator in FPGA

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dc.contributor.authorAlçın, Murat
dc.contributor.authorİhsan Pehli̇van
dc.contributor.authorİsmail Koyuncu
dc.contributor.orcid0000-0002-2874-7048
dc.contributor.orcid0000-0001-6107-655X
dc.contributor.orcid0000-0003-4725-4879
dc.date.accessioned2025-11-13T09:06:40Z
dc.date.issued2016-03-14
dc.identifier.doihttps://doi.org/10.1016/j.ijleo.2016.03.042
dc.identifier.endpage5505
dc.identifier.issn0030-4026
dc.identifier.issue13
dc.identifier.openalexW2299244345
dc.identifier.startpage5500
dc.identifier.urihttps://hdl.handle.net/11421/478
dc.identifier.urihttps://doi.org/10.1016/j.ijleo.2016.03.042
dc.identifier.volume127
dc.language.isoen
dc.relation.ispartofOptik
dc.rightsopenAccess
dc.subjectField-programmable gate array
dc.subjectComputer science
dc.subjectCORDIC
dc.subjectVHDL
dc.subjectVirtex
dc.subjectChaotic
dc.subjectComputer hardware
dc.subjectArtificial neural network
dc.subjectMATLAB
dc.subjectSigmoid function
dc.subjectHardware description language
dc.subjectModelSim
dc.subjectEmbedded system
dc.subjectArtificial intelligence
dc.titleHardware design and implementation of a novel ANN-based chaotic generator in FPGA
dc.typeArticle
dspace.entity.typePublication
local.authorid.openalexA5024465081

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